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dc.contributor.authorValueva, M. V.-
dc.contributor.authorВалуева, М. В.-
dc.contributor.authorNagornov, N. N.-
dc.contributor.authorНагорнов, Н. Н.-
dc.contributor.authorLyakhov, P. A.-
dc.contributor.authorЛяхов, П. А.-
dc.contributor.authorValuev, G. V.-
dc.contributor.authorВалуев, Г. В.-
dc.contributor.authorChervyakov, N. I.-
dc.contributor.authorЧервяков, Н. И.-
dc.date.accessioned2020-06-25T14:20:38Z-
dc.date.available2020-06-25T14:20:38Z-
dc.date.issued2020-
dc.identifier.citationValueva, M.V., Nagornov, N.N., Lyakhov, P.A., Valuev, G.V., Chervyakov, N.I. Application of the residue number system to reduce hardware costs of the convolutional neural network implementation // Mathematics and Computers in Simulation. - 2020. - Volume 177. - Pages 232-243ru
dc.identifier.urihttp://hdl.handle.net/20.500.12258/12120-
dc.description.abstractConvolutional neural networks are a promising tool for solving the problem of pattern recognition. Most well-known convolutional neural networks implementations require a significant amount of memory to store weights in the process of learning and working. We propose a convolutional neural network architecture in which the neural network is divided into hardware and software parts to increase performance and reduce the cost of implementation resources. We also propose to use the residue number system (RNS) in the hardware part to implement the convolutional layer of the neural network. Software simulations using Matlab 2018b showed that convolutional neural network with a minimum number of layers can be quickly and successfully trained. The hardware implementation of the convolution layer shows that the use of RNS allows to reduce the hardware costs on 7.86%–37.78% compared to the two's complement implementation. The use of the proposed heterogeneous implementation reduces the average time of image recognition by 41.17%ru
dc.language.isoenru
dc.publisherElsevier B.V.ru
dc.relation.ispartofseriesMathematics and Computers in Simulation-
dc.subjectConvolutional neural networksru
dc.subjectField-programmable gate array (FPGA)ru
dc.subjectImage processingru
dc.subjectQuantization noiseru
dc.subjectResidue number system (RNS)ru
dc.subjectConvolutional neural networksru
dc.titleApplication of the residue number system to reduce hardware costs of the convolutional neural network implementationru
dc.typeСтатьяru
vkr.instИнститут математики и естественных наукru
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