Please use this identifier to cite or link to this item: https://dspace.ncfu.ru/handle/20.500.12258/21887
Title: High Performance Parallel Pseudorandom Number Generator on Cellular Automata
Authors: Lyakhov, P. A.
Ляхов, П. А.
Valueva, M. V.
Валуева, М. В.
Keywords: Cellular automata;Hardware-based parallel implementation;Parallel computing;Pseudorandom number generation
Issue Date: 2022
Publisher: MDPI
Citation: Levina, A., Mukhamedjanov, D., Bogaevskiy, D., Lyakhov, P., Valueva, M., Kaplun, D. High Performance Parallel Pseudorandom Number Generator on Cellular Automata // Symmetry. - 2022. - Том 14. - Выпуск 9. - Номер статьи 1869. - DOI10.3390/sym14091869
Series/Report no.: Symmetry
Abstract: Nowadays, the practice of developing algorithms to maintain the confidentiality of data shows that there is a lack of some features, such as velocity, predictability, etc. Generating pseudorandom numbers is one such problem that lies in the basement of many algorithms, even in hardware microprograms. An unreliable generator can cause cyberattacks on it, despite the security in the upper layers. At the same time, the algorithm should be fast enough to provide uninterrupted circuit work for the entire system. The paper presents a new algorithm generating pseudorandom numbers on cellular automata, which is not only fast and easy-repeating, but unpredictable enough and can be used in cryptographic systems. One of the main tasks of pseudorandom number generators (PRNG) is to present a high level of nonlinearity, or as it can also be named, asymmetry. Using the National Institute of Standards and Technology (NIST) statistical test suite for random number generators and pseudorandom number generators, it is shown that the presented algorithm is more than three times superior to the state-of-the-art methods and algorithms in terms of p-value. A high level of the presented algorithm’s parallelization allows for implementation effectively on calculators with parallel structure. Central Processing Unit (CPU)-based architecture, Field-Programmable Gate Array (FPGA)-based architecture, Compute Unified Device Architecture (CUDA)-based architecture of PRNG and different PRNG implementations are presented to confirm the high performance of the proposed solution.
URI: http://hdl.handle.net/20.500.12258/21887
Appears in Collections:Статьи, проиндексированные в SCOPUS, WOS

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