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https://dspace.ncfu.ru/handle/20.500.12258/26635| Title: | Comparative Analysis of Computational Complexity of Fast Matrix Multiplication Algorithms |
| Authors: | Abdulsalyamova, A. S. Абдулсалямова, А. Ш. Kalita, D. I. Калита, Д. И. Lyakhov, P. A. Ляхов, П. А. Nagornov, N. N. Нагорнов, Н. Н. Bergerman, M. V. Бергерман, М. В. |
| Keywords: | Unit-gate model;SA;Computational complexity;Coppersmith-Winograd algorithm;Matrix multiplication |
| Issue Date: | 2023 |
| Citation: | Abdulsalyamova, A.S., Kalita, D.I., Lyakhov, P.A., Nagornov, N.N., Bergerman, M.V. Comparative Analysis of Computational Complexity of Fast Matrix Multiplication Algorithms // Proceedings of the 2023 International Conference "Quality Management, Transport and Information Security, Information Technologies", IT and QM and IS 2023. - 2023. - pp. 101-103. - DOI: 10.1109/ITQMTIS58985.2023.10346369 |
| Series/Report no.: | Proceedings of the 2023 International Conference "Quality Management, Transport and Information Security, Information Technologies", IT and QM and IS 2023 |
| Abstract: | Matrix multiplication is a commonly used operation in various graphics, imaging, robotics, and signal processing applications. In connection with the increase in the growth of the characteristics of digital information, it is necessary to improve the algorithms for processing information and the efficiency of their implementation. Various fast matrix multiplication algorithms are used to solve this problem. This paper presents a comparative analysis of the computational complexity of matrix multiplication implemented using the direct, Strassen and Coopersmith-Winograd algorithms. A theoretical analysis showed that the use of fast matrix multiplication algorithms can reduce the delay and area compared to the direct algorithm to 82.68% and 5.03%, respectively, depending on the selected adder, matrix multiplication algorithm and matrix size. In further research, it is planned to implement matrix multiplication hardware using the Strassen and Coopersmith-Winograd algorithms on FPGA and ASIC, and their comparative analysis. |
| URI: | http://hdl.handle.net/20.500.12258/26635 |
| Appears in Collections: | Статьи, проиндексированные в SCOPUS, WOS |
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| File | Size | Format | |
|---|---|---|---|
| scopusresults 2967 .pdf Restricted Access | 133.41 kB | Adobe PDF | View/Open |
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