Study of a Redundant Residue Number System for Single Error Correction

Abstract

One approach to reliability is to use a redundant residue number system. In general, two redundant moduli are required to detect and correct a single error. This paper considers an approach to error correction using a single redundant modulo, which allows a significant reduction in the hardware used, but at a significant cost in computational speed. The use of an approximate method based on the Chinese remainder theorem allows the speed of computation to be increased by eliminating the computationally complex operation of taking the remainder from the division by the range of the residue number system. A method based on the approximate method with one redundant modulo is proposed. Modelling of the considered methods on ASICs in RTL and physical synthesis environment Cadence Genus Synthesis Solution is carried out.