Please use this identifier to cite or link to this item: https://dspace.ncfu.ru/handle/123456789/34314
Title: High-speed residue number system reverse converter based on new Chinese remainder theorem with fractional values
Authors: Lyakhov, P. A.
Ляхов, П. А.
Bergerman, M. V.
Бергерман, М. В.
Abdulkadirov, R. I.
Абдулкадиров, Р. И.
Nagornov, N. N.
Нагорнов, Н. Н.
Kalita, D. I.
Калита, Д. И.
Keywords: ASIC;Reverse converter;Hardware modeling;Modular arithmetic;Residue number system (RNS)
Issue Date: 2026
Publisher: Springer
Citation: Lyakhov P., Bergerman M., Abdulkadirov R., Nagornov N., Kalita D., Kopets E., Butusov D. High-speed residue number system reverse converter based on new Chinese remainder theorem with fractional values // Computational Mathematics and Modeling. - 2026. - 37 (4). - pp. 876 - 897. - DOI: 10.1007/s10598-026-09719-2
Series/Report no.: Computational Mathematics and Modeling
Abstract: This article proposes a novel high-speed reverse converter from the Residue Number System (RNS) to a positional number system. The proposed method is designed for arbitrary RNS moduli sets that include a power-of-two modulus and is based on a Chinese Remainder Theorem with fractional values conversion technique. Hardware simulations demonstrate that our converter outperforms the state-of-the-art designs by 34.70% to 86.11% in terms of speed, at the cost of increased silicon area and power consumption, making it particularly suitable for latency-critical applications. This performance gain makes it directly applicable to demanding RNS-based domains such as cryptography, digital signal processing, and image processing for neural networks. Furthermore, the proposed conversion method provides a foundation for efficiently implementing other complex RNS operations, including division, sign detection, and magnitude comparison.
URI: https://dspace.ncfu.ru/handle/123456789/34314
Appears in Collections:Статьи, проиндексированные в SCOPUS, WOS

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