Efficient hardware implementation of forward conversion WNS-RNS on FPGA

Abstract

The Residue number system is a modern powerful tool for solving a number of specialized tasks: digital signal processing, cryptography, increasing reliability, accelerating computations, etc. The effectiveness of its use largely depends on the solution of the problem of reducing the delay and area costs for the forward conversion of numerical data from the weighted number system to the residue number system and reverse conversion. The paper proposes a method of forward conversion to the residue number system based on distributed data processing. It's hardware implementation on FPGA and comparison with the standard algorithm of the IEEE Numeric_std library are presented