The use of redundant modular codes for improving the fault tolerance of special processors for digital signal processing

Abstract

The purpose of the research is to increase the fault tolerance of high-speed special processors for digital signal processing (DSP). Achieving this goal is possible due to parallelization of computations. It is shown in the paper that, to provide signal processing in real time, it is necessary to use algebraic structures having the properties of a ring and a field, in particular, a residue number system (RNS) and a polynomial residue number system (PRNS). Application of new modular technologies in the DSP problems, due to parallelization at the level of operations of independent low-bit data processing, allows not only to increase the speed of computing, but also to ensure obtaining the correct result in the conditions of interference in the transmission and the equipment failure. This paper presents a new algorithm for error correction on the basis of calculation of a truncated convolution. The use of this algorithm allows developing special processors for digital signal processing (SP for DSP), capable of maintaining the state of operability in the case of failures due to reconfiguration of the structure